The Nerves core team is focused on microprocessor-based embedded devices, so supporting a Cortex-M0 device is not something that we’d take on. That’s not to say that what you propose wouldn’t be interesting.

The two routes I know that might support the Pico are:

1. Porting AtomVM which is a small BEAM bytecode interpreter
2. Using Lumen to compile Elixir to machine code.

The RPi Pico is based on the RP2040-Microcontroller, which is a Cortex-M0+. While its the biggest M0 I know of (lots of RAM, Flash, MHz) its still a very limited design, most notably: it has no FPU.

The most lightweight option AtomVM offers is a STM32F4 which is a Cortex-M4 with FPU.

https://github.com/bettio/AtomVM/blob/master/README.STM32.Md

Maybe they can go smaller? But M0 - doubtful!? If its possible this would be indeed a great opportunity and I’m sure the AtomVM-team will take it.

see here for a comparison (Table “ARM Cortex-M instruction variations”)

You should have a look at https://www.grisp.org/ if you are interested in BEAM on smaller platforms.

EDIT: Just found this: https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/is-cortex-m4-the-strongest